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Renesas Electronics /R7FA6M3AH /EPTPC0 /SYTLIR

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Interpret as SYTLIR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ANCE0SYNC0DREQ

Description

SYNFP Transmission Interval Setting Register

Fields

ANCE

Announce Message Transmission Interval SettingThese bits set the interval for the transmission of Announce messages.
SYNC

Sync Message Transmission Interval SettingThese bits set the interval for the transmission of Sync messages. The setting is also placed in the logMessageInterval field of transmitted Sync messages.
DREQ

Delay_Req Transmission Interval Average Value/ Pdelay_Req Transmission Interval SettingThe bits set the average interval for the transmission of Delay_Req messages and the interval for the transmission of Pdelay_Req messages.The setting is also placed in the logMessageInterval field of Delay_Resp messages.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data